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Small scale programmable logic devices offer numerous benefi

 
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Octavian1

Joined: 22 Apr 2013
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PostPosted: Mon Apr 22, 2013 9:47 pm    Post subject: Small scale programmable logic devices offer numerous benefi Reply with quote

In the world of programmable logic, the phrase 'ultra low density' stands out starkly. The reason? Over the years, the trend has to been to create devices with ever more features on ever smaller manufacturing processes. While the devices themselves may not be getting smaller, their density has increased dramatically.

And yet Lattice Semiconductor is developing devices which it proudly describes as 'ultra low density'. How does the company explain the use of a phrase which implies a large die with not much on it? Gordon Hands, director of marketing for low density solutions, explained. "When you look at the programmable logic market, there are low density, and mid and high end products – an example of low density is Lattice's ECP3 range. But we didn't think it was a good term to use to describe what we're doing, which is driving beyond what programmable logic has delivered in the past in terms of cost."

Lattice's latest announcement – the ice40 LP384 – boasts 384 look up tables (LUTs, equivalent to 7680 gates) and is supplied in a package measuring 2.5 x 2.5mm. In its basic state, the LP384 consumes 25µW. "As you start to toggle the clock nets and ramp frequency, it will start a linear power ramp," Hands noted. "When it's running at 10MHz, you might see a power consumption of 5 to 10mW, but it's design dependent."

Yet, despite its size, the part supports LVDS interface rates of 525Mbit/s. Small size is matched by small price: in high volume, LP384 fpgas will cost 50cents. Hands believes this is a significant achievement. "If you go back to 1995, the price of a similar device was $50. In 2002, it was $5, but today, it's 50cents."

Why is Lattice pushing towards the other end of the market than its competitors? Hands said: "We are forging a different path to that of other companies in the market – and deliberately so. We believe there is a range of applications in which designers would like to use programmable logic, but where the cost and power consumption of parts have ruled them out."

Hands believes this is true for high volume applications and for handheld and battery powered products. "We're seeing designers use products from the ice40 range for a number of applications, including devices such as smartphones and tablets. But we are also seeing the attributes of these products fitting well into some handheld industrial devices where size and power consumption are critical., such as point of sale terminals and industrial sensors"

One particular sensor application of ice40 devices has been in geophones – devices used for oil exploration and to monitor seismic activity. "They need to be small and low power," Hands asserted. "But because there are thousands of sensors in a typical geophone system, cost per unit becomes important."

Lattice is keen to emphasise the size of the ice40 LP384, as well as its capabilities. "The importance of device size varies depending on who you talk to," Hands admitted, "but in mobile consumer apps, it's absolutely critical."

The change is being driven by a new approach to product design. "Historically, phones were built with the battery underneath the pcb," he explained, "and there was a lot of space for the pcb. Now, phones are being built with the two elements side by side. Because designers are looking to maximise operating time between charges, they are looking to maximise the space available to the battery and to minimise the space taken by the pcb."

Manufacturing technology is another driver. "The cost of manufacturing increases with package size," Hands suggested. "When we talk with customers, they tell us that large packages are not acceptable now. There is a big cost difference between making a product with a 2.5 x 2.5mm device and with a 4 x 4mm device. Size is critical and the use of the 40nm manufacturing process helps us solve this."



Nevertheless, there are applications where size is not so critical. "These customers don't worry so much about package size," he continued. "While they are trying to make their products smaller, they are looking for a different balance between cost and size."

But Hands knows the package can't be smaller than the die. "Once we start getting down to these dimensions, the die takes up a large percentage of the package area." And that opens the door for more radical packaging techniques, such as wafer level chip scale packaging (wlcsp). "It's a useful technique," Hands asserted. "Amongst the things we like about wlcsp is the smaller package height and the lower cost of the approach." But wlcsp isn't appropriate for every application. "It's not a panacea," Hands pointed out, "because the package is the die and that defines how much I/O is available. As we shrink the die, we get to the point where it is too small to attach a reasonable number of balls."

Take the 'top off' an LP384 and you'll find the die is just 1 x 1mm. "Even when you use a 0.4mm ball pitch, you can only attach nine balls," Hands said. "If more I/O is needed, then we offer a low cost wire bonded bga which features 36 balls." Other packages include a 32pin qfn measuring 5 x 5mm and a 49 ball ucbga measuring 3 x 3mm. And it's likely that Lattice will offer a 2 x 2mm wlcsp option.
The LP384 ships without any embedded memory; is this simply because there's not enough space on the die? "No," said Hands, "it's more about matching the specifications to the potential applications. These might be to link i2c to GPIO or spi to i2c. For the most part, these actions can be done without block memory. A lot of applications need I/O expansion – more uarts, for example – and the LP384 is a good way to enable that inexpensively.

Developing such small scale products requires a new approach. "It used to be a sequential process," Hands noted, "but we now need to engineer silicon and package in parallel. And, as we architect new parts, we develop a handful of typical applications and try to adjust the resources to optimise the part to those apps."

One of the benefits of the wlcsp approach is cost. "There's no substantial packaging cost; we take the wafer, attach a redistribution layer and put the balls on that," Hands said. "That enables us to offer the LP384 for 50cents in volume."

The challenge for Lattice now is to work out how to reduce the cost further. "We're finding – particularly in consumer applications – that projects have a fixed budget. We can now address those who have 50cents to spend on programmable logic; what we would like to do is address those who have 25cents to spend."

It's unlikely that Lattice will add new members to the ice40 family. "We're turning our attention to the next generation," Hands concluded, "and investing for the future."
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martaacosa

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PostPosted: Sat Jun 01, 2013 5:40 am    Post subject: Reply with quote

Microprocessor and programmable logic design are converging, though they ... The digital section was implemented with either small-scale integrated (SSI) ICs or custom logic. ... Armed with timers, counters, UARTs, and other features, many ... Learning the benefits of a common language from software, ...
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pattersonjohn514

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PostPosted: Sat Jul 13, 2013 11:00 am    Post subject: Reply with quote

In the world of programmable logic, the phrase 'ultra low density' stands out starkly. The reason? Over the years, the trend has to been to create ...
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PostPosted: Mon Jul 15, 2013 12:00 pm    Post subject: Reply with quote

In the world of programmable logic, the phrase 'ultra low density' stands out starkly. The reason? Over the years, the trend has to been to create ...
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PostPosted: Fri Jul 19, 2013 6:21 am    Post subject: Reply with quote

In the world of programmable logic, the phrase 'ultra low density' stands out starkly. The reason? Over the years, the trend has to been to create ...
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PostPosted: Fri Jul 19, 2013 12:04 pm    Post subject: Reply with quote

Programmable Array Logic (PAL) is a type of programmable logic devices. PAL is employed to perform logic functions in electronic circuits. The technical details of network support for PAL issues are discussed in this article.
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PostPosted: Wed Jul 31, 2013 5:17 am    Post subject: Reply with quote

Microprocessor and programmable logic design are converging, though they still require a common language. After one of my engineers told me that she had found a typo in her hardware, I thought just how far design has come in the last 30 years and more. Back then, the analog section of a system consisted of discrete components and op amps.
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samithaxee

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PostPosted: Thu Aug 01, 2013 4:03 am    Post subject: Reply with quote

Microprocessor and programmable logic design are converging, though they still require a common language. After one of my engineers told me that she had found a typo in her hardware, I thought just how far design has come in the last 30 years and more. Back then, the analog section of a system consisted of discrete components and op amps.
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PostPosted: Sat Aug 10, 2013 4:19 am    Post subject: Reply with quote

Microprocessor and programmable logic design are converging, though they still require a common language. After one of my engineers told me that she had found a typo in her hardware, I thought just how far design has come in the last 30 years and more. Back then, the analog section of a system consisted of discrete components and op amps.
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PostPosted: Mon Aug 12, 2013 10:37 am    Post subject: Reply with quote

Microprocessor and programmable logic design are converging, though they still require a common language. After one of my engineers told me that she had found a typo in her hardware, I thought just how far design has come in the last 30 years and more. Back then, the analog section of a system consisted of discrete components and op amps.
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