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The days of 8bit microcontrollers are numbered as the Cortex-M0 and M0+ wagon gains momentum

When ARM launched the Cortex-M0 core in February 2009, it had a particular market sector in mind.

The applications, it believed, would be those which not only needed performance, but also better energy efficiency than was available at the time.

It envisaged the 32bit Cortex-M0 core being applied in such areas as low cost microcontrollers and in analogue and mixed signal devices. The push – even though it wasn't acknowledged publicly – was to target the 8bit microcontroller.

The core occupied around 12,000 gates and consumed 85µW/MHz when manufactured on a 0.18µm process. Richard York, at the time ARM's director of embedded product marketing, hinted at the future when he implied a much smaller device was on the cards.

That device arrived at Embedded World 2012 when ARM launched the Cortex-M0+ core. York noted: "When we looked at the Cortex-M0 core, we said it was good, but we could do better." Improvements included a 50% improvement in energy efficiency over the M0 core and a performance claimed as 'significantly better' than the nearest 8 and 16bit competitors.

And so the process began of providing a cost competitive alternative to 8bit mcus, but with better performance.

Freescale was the lead customer for the M0+, using the core to create the Kinetis L range. Geoff Lees, senior vice president at Freescale and general manager of its microcontroller business, said the launch of Kinetis L meant the end of 8 and 16bit mcu development at company. NXP launched the LPC800 range towards the end of 2012. The fact it is being targeted at applications currently being powered by 8bit mcus can be seen from one of the packaging options – an 8pin dip. Meanwhile, Infineon has launched the XMC1000 range; again targeting 8bit applications and providing the devices in packages such as tssops.

But M0 and M0+ cores are not limited to applications in microcontrollers. The M0 core is at the centre of the recently announced PSoC4, part of Cypress' programmable SoC family. The devices integrate analogue and digital fabric and capacitive touch technology with the M0 core. "PSoC4 enables design engineers to leverage the overall trend toward industry standard, lower cost ARM based solutions, the broad availability of ARM software and the migration of 8 and 16bit mcu applications to 32bit solutions," said John Weil, Cypress' senior director of PSoC marketing.

PSoC4 is the second ARM based member of the PSoC range; the PSoC5LP features the M3 core. Jim Davis, product marketing manager for PSoC, said: "We have been working with ARM for a while on the development of an M0 based part; in particular on the development of touch capable devices." Cypress' TrueTouch controllers are also based on the M0 core.

If Cortex-M0/M0+ parts are to displace their 8bit competitors, it will be on the basis of price; those currently specifying 8bit mcus are highly cost sensitive. Infineon's senior director of industrial and multimarket microcontrollers is Dr Stephan Zizala. "While 32bit mcus solve many problems, price remains an issue. Vendors have tried to solve this problem by reducing the peripheral set. Our target is to break this barrier." And Infineon is aggressive in achieving this target. By building XMC1000 parts on a 65nm embedded flash process using 300mm wafers, the mcus will sell in volume for as little as €0.25.

Jan Jaap Bezemer, director of marketing for NXP's microcontroller line, added: "32bit can offer a lot of things, but there remain questions about use and cost. What NXP didn't want to do was to design an entry level 32bit part; instead, we decided to create a device targeted at the 8bit market, but which used 32bit technology."

Davis agreed on the price issue. "PSoC4 parts will cost around $1. When the price of a 32bit device gets to be less than $1, that's when it gets interesting. The M0/M0+ cores have allowed vendors to develop chips which target that price, but Cypress has to focus on why it builds these products."

Cypress believes the launch of the M0 based PSoC4 will open new markets for the approach. Davis pointed to field oriented motor control as one potential application. "The programmable analogue capability will help with the sensorless control, while there is logic available for other tasks," he said. One market which Cypress is targeting is motors in electric bikes, with China holding the largest potential. "But PSoC4 is also suited to interface applications in home appliances," Davis continued, "particularly where companies are looking to reduce cost by integrating functionality."

In Davis' opinion, PSoC4 will be a device more popular with mcu engineers where the applications need only a little hardware engineering.

Dr Zizala noted that Infineon is targeting the XMC1000 range at particular markets – general purpose, led lighting, power conversion and motor control. "Low end motor control will be an important market," he contended.

Devices in Infineon's XMC1300 range will be best suited to motor control, with three broad groups being addressed – ac induction, brushless d and permanent magnet synchronous. The devices include special purpose timers for motor control and are suited to digital power conversion. They have motor position interface and a maths coprocessor.

Motor control capability is enhanced by the CCU8 capture/compare unit, which Infineon says plays a major role in applications that need complex PWM signal generation. CCU8 comprises four 16bit capture/compare timer slices, with each slice able to work in capture or compare mode. In compare mode, each has two dedicated compare channels that enable up to four PWM signals to be generated per timer slice.

The CCU8, along with a position interface unit and a maths coprocessor, is said to enable sensorless field oriented motor control. At the launch of the XMC1000 range, Infineon claimed the feature was 'unique for Cortex-M0 based products'.

NXP's LPC800 mcus are said to offer two features that provide 8bit developers with flexibility and control. The flexible switch matrix allows on-chip peripheral I/O to be assigned to nearly any pin, reducing pcb complexity. Meanwhile, the state configurable timer (SCT) can be customised to meet specific application requirements.

The basic SCT features two 16bit PWMs with four capture inputs and four match outputs, with each match register shadowed. NXP says this allows the LPC800 to deliver most timing or PWM functions found on popular 8bit mcus. Meanwhile, the SCT supports states and events, allowing users to create counting, output, input and control functions for a range of applications.

So do these recent announcements spell the end of the road for the 8bit mcu? Davis thinks so. "There has been a lot of talk about the 8/16 to 32bit transition over the last few years, but it hasn't happened as quickly as people expected, mainly due to the economy. But a lot of Cypress' customers are now taking the transition seriously and looking to migrate their designs away from 8bit devices. We're starting to see lot of interest in a low cost PSoC with 32bit capability," he concluded.
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